Silicon (Si) monocrystalline is conventionally used as constituent material for power semiconductor devices controlling high breakdown voltage and high current. The power semiconductor devices fall into several types, such as bipolar transistors, insulated gate bipolar transistors (IGBTs), metal insulator semiconductor field-effect transistors (MISFETs), Schottky barrier diodes (SBDs), and P-intrinsic-N (PiN) diodes, which are selectively used depending on the intended use.
For example, bipolar transistors and IGBTs cannot be switched at high speed although higher current density enables higher current as compared to MOSFETs. For example, the usage of bipolar transistors is limited up to a switching frequency of several kHz and the usage of IGBTs is limited up to about 20 kHz. On the other hand, power MOSFETs can be operated at high speed up to several MHz, although lower current density makes it difficult to handle higher current as compared to bipolar transistors and IGBTs.
However, since a power semiconductor device supporting both high current and high-speed performance is strongly demanded in the market, efforts have been made to improve IGBTs and power MOSFETs, which have been substantially developed closely to the material limits. Among such power semiconductor devices, a cross-sectional structure of a conventional MOSFET will be described. FIG. 17 is a cross-sectional view of a configuration of a conventional MOSFET. As depicted in FIG. 17, a conventional MOSFET has an n− drift layer 102 disposed on a front surface of an n+ semiconductor substrate 101 acting as an n+ drain layer, and a p-base region 103 is selectively disposed in a surface layer of the n− drift layer 102.
An n+ source region 104 is selectively disposed in a surface layer of the p-base region 103. A gate electrode 106 is disposed via a gate insulation film 105 on a surface of a portion of the p-base region 103 interposed between the n− drift layer 102 and the n+ source region 104. A source electrode 107 is in contact with the p-base region 103 and the n+ source region 104. A drain electrode 108 is disposed on a back surface of the n+ semiconductor substrate 101. Moreover, superjunction MOSFETs that have a drift layer configured as a parallel p-n layer with p-type regions and n-type regions alternately and repeatedly arranged are recently attracting attention (see Non-Patent Literatures 1 and 2).
The superjunction MOSFETs are known as being proposed as a theory by Fujihira in 1997 as described in Non-Patent Literature 1 and put into production as CoolMOSFET by Deboy, et al. in 1998 as described in Non-Patent Literature 2. The superjunction MOSFETs are characterized in that columnar p-layers having a longitudinal shape in a substrate depth direction in the n− drift layer are arranged at predetermined intervals so as to dramatically improve ON-resistance without deterioration in breakdown voltage characteristics between source and drain.
Semiconductor materials replacing silicon are studied in terms of power semiconductor devices and silicon carbide (SiC) is attracting attention as a semiconductor material usable for producing (fabricating) a next generation power semiconductor device excellent in low ON-voltage, high-speed characteristics, and high-temperature characteristics (see Non-Patent Literature 3). This is because silicon carbide is chemically very stable semiconductor material with a wide band gap of 3 eV and can be used very stably as a semiconductor even at high temperature. Another reason is that silicon carbide has critical electric field that is ten-fold higher than silicon and therefore, can make ON-resistance sufficiently small.
As described above, silicon carbide is a semiconductor material highly likely to exceed the material limit of silicon and is, therefore, largely expected to grow in use as power semiconductors or particularly MOSFETs in the future. Among the features thereof, silicon carbide is particularly expected to achieve smaller ON-resistance, and it is expected to realize a vertical SiC-MOSFET having lower ON-resistance with high breakdown voltage characteristics maintained. A cross-sectional view of the structure of a typical vertical SiC-MOSFET is the same as that of a vertical MOS-FET using silicon as a semiconductor material and is as depicted in FIG. 17.
A vertical SiC-MOSFET formed in this way is expected to be utilized as a switching device having low ON-resistance and switchable at high speed in power conversion equipment such as an inverter for motor control and an uninterruptible power supply (UPS). However, when high voltage is applied between a source and a drain, the high voltage is applied not only to an active region through which current flows during on-time but also to an edge termination structure region that is disposed in a peripheral portion of the active region and that sustains the breakdown voltage. When high voltage is applied, the edge termination structure region has a depletion layer spreading in a lateral direction (a direction parallel to a substrate principal plane) and is, therefore, susceptible to electrical charge of the substrate surface. As a result, breakdown characteristics may become unstable.
A junction termination (JTE: Junction Termination Extension) structure is known as structure that eliminates such a problem and has a p-type region formed surrounding a corner portion of a p-base region to alleviate or disperse an electric field of the edge termination structure region for improving the breakdown voltage of the entire semiconductor device (see. e.g., Non-Patent Literatures 4 and 5), and the structure is applied also to semiconductor devices using silicon carbide as a semiconductor material (see, e.g., Patent Documents 1 to 3).    Patent Document 1: Specification of U.S. Pat. No. 6,002,159    Patent Document 2: Specification of U.S. Pat. No. 5,712,502    Patent Document 3: Publication of Japanese Patent No. 3997551    Non-Patent Literature 1: T. Fujihira, “Theory of Semiconductor Superjunctions Devices”, Japanese Journal of Applied Physics, Vol. 36, Part 1, No. 10, pp. 6254-6262, 1997    Non-Patent Literature 2: G. Deboy, et al, “A New Generation of High Voltage MOSFETs Breaks the Limit Line of Silicon”, IEEE International Electron devices Meeting (IEDM), (USA), December 1998, pp. 683-685    Non-Patent Literature 3: K. Shenai, et al, “Optimum Semiconductors for High-Power Electronics”, IEEE Transactions on Electron Devices, vol. 36, No. 9, September 1989, pp. 1811-1823    Non-Patent Literature 4: T. K. Wang, et al, “Effect of Contact Resistivities and Interface Properties on The Performance of SiC Power Devices”, IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD), 1992, pp. 303-308    Non-Patent Literature 5: V. A. K Temple, “Junction Termination Extension for Near-Ideal, Breakdown Voltage in p-n Junctions”, IEEE Transactions on Electron Devices, Vol. 33, No. 10, October 1986, pp. 1601-1608